SiFive has announced the launch of its latest generation of RISC-V processor cores, the P570 Gen 3 and the updated P550 Gen 3. These new cores are designed to address the growing demands for high-performance computing in edge AI, consumer electronics, and commercial IoT applications.
The P570 Gen 3 stands out with its advanced architectural improvements, including a 3-wide, 13-stage fully out-of-order superscalar execution pipeline. This design allows it to deliver significant performance gains while maintaining power efficiency. Traditional CPU workloads see a 7-13% performance improvement on SpecInt 2006-2017 benchmarks compared to the P550 Gen 1, along with a 13% reduction in dynamic power consumption.
For modern AI workloads, the P570 Gen 3 introduces a 128-bit vector pipeline that delivers up to 2X performance gains on Geekbench and up to 21X more performance in specific AI-relevant workloads compared to the Gen 1 core. This is achieved through specialized dot-product instructions that accelerate convolution and matrix-multiply operations, making it highly suitable for edge AI applications.
The P570 Gen 3 also includes a comprehensive set of features beyond just the core. It comes with system IP such as the RISC-V standard-compliant advanced interrupt architecture (AIA), WorldGuard for trusted execution environments on secure SoCs, and a second-generation IOMMU. The core is scalable up to 16 cores in a compute subsystem, providing flexibility for various application requirements.
Compatibility with the RVA23 ISA profile is a significant aspect of the P570 Gen 3. This profile is backed by major ecosystem players including Google, Red Hat, and Canonical, ensuring stability and consistency for software developers. The core supports all mandatory RVA23 requirements, including Hypervisor (H) and Vector (V) extensions, as well as optional extensions for enhanced security and management. It also includes support for FP16 and BF16 to accelerate modern AI workloads.
The P570 Gen 3 is now available, with SiFive working with customers across several market segments. This core is ideal for use cases requiring high performance and power efficiency within a small area budget. For those with strict area constraints who do not require vector capabilities, the updated P550 Gen 3 offers a highly efficient RVB23-compatible core.
This latest release from SiFive underscores its commitment to providing high-performance, efficient solutions for a wide range of applications, particularly in the rapidly growing fields of edge AI and IoT. The introduction of these new cores sets a new baseline for RISC-V standardization and opens up new possibilities for developers and manufacturers alike.
