Europe has taken a decisive step toward semiconductor dominance with the inauguration of Imec’s NanoIC pilot line—a 12,000 m² cleanroom ecosystem designed to push chip technology beyond 2 nm. The facility, unveiled today in Leuven, Belgium, is the cornerstone of a continent-wide push to secure its role in the AI era, leveraging collaboration between governments, research centers, and industry heavyweights like ASML.
The new 2,000 m² extension—part of a broader $1.5 billion NanoIC initiative—will house cutting-edge tools, including ASML’s High NA EUV lithography system, set to arrive mid-March. This system is critical for etching sub-2nm features, a prerequisite for next-generation processors and AI accelerators. The pilot line’s capacity and toolset will be further expanded over five years, with over 100 new systems distributed across partner sites in France, Germany, Finland, Romania, and Ireland.
- Sub-2nm race: The pilot line will enable research into 2 nm and beyond, positioning Europe to compete with TSMC and Samsung in advanced nodes.
- ASML’s role: The High NA EUV scanner, a $200M+ tool, is essential for patterning features smaller than 2 nm, a bottleneck for AI and HPC chips.
- Industry collaboration: IDMs (like Intel, Qualcomm), foundries, and startups will co-develop processes here, reducing Europe’s reliance on external suppliers.
- Government backing: Support from the EU, Belgium, and Flanders ensures funding for expansion, including a planned 4,000 m² cleanroom by 2027.
The inauguration drew high-profile attendees, including ASML CEO Christophe Fouquet and Flemish Minister-President Matthias Diependaele, who framed the effort as a strategic choice for Europe. We don’t have to be the biggest, Diependaele noted. But we can be the best. With the European Chips Act driving policy, the pilot line aims to fortify the continent’s industrial base, ensuring sovereignty in a sector critical to AI, defense, and economic growth.
Over the next five years, the NanoIC pilot line will integrate tools for 5 nm, 3 nm, and sub-2 nm processes, with a focus on yield optimization and cost reduction. Early projects will target AI-specific architectures, such as high-bandwidth memory interfaces and energy-efficient compute cores. The facility’s open-access model—allowing startups and universities to participate—mirrors imec’s long-standing role as a hub for innovation.
ASML’s involvement underscores the urgency of the mission. This is the best example of global leaders collaborating to advance chip technology, Fouquet said. With China developing domestic EUV alternatives and the U.S. investing heavily in domestic fabrication, Europe’s move could redefine the global semiconductor landscape—if execution matches ambition.
The pilot line’s success hinges on three pillars: tool integration, talent recruitment, and industry adoption. Imec has already launched a hiring drive to staff the facility, targeting engineers with expertise in EUV, atomic layer deposition, and advanced packaging. The first production runs are expected by late 2026, with full capacity targeted for 2028.
